1. Field of the Invention
This invention relates to a method and a device for synchronization of messages. The invention is more particularly concerned with a method and a device for synchronizing short messages transmitted in the so-called frequency-evasion mode.
For a good understanding of the invention, the term "message" as used hereinafter has to be considered as a set of numerical data which are transmitted together and are necessary for the application of a given data-processing operation.
2. Description of the Prior Art
At the time of reception of messages, it is necessary to synchronize the receiver in accordance with the received data. The rate of transmission of bits constituting the message is in fact known at the receiver but the phase of these bits is not known and the received data must accordingly be utilized in order to reconstitute a reception clock signal which is in phase with said data.
"Frequency-evasion transmission" is generally understood to mean a mode of transmission in which each message is transmitted by modulating a different carrier frequency in order to prevent interception of these messages by a third party for whom they are not intended.
The problem of synchronization assumes even greater importance in transmission systems of the frequency-evasion type by reason of the fact that the phase deviations with respect to the received data are liable to vary as a function of the carrier frequency employed for the transmission. It accordingly becomes necessary to make use of high-performance synchronization devices which make it possible to restore the synchronization very rapidly, and even more so as the messages transmitted are of shorter duration.
In one known method of synchronization, the phase of a reception clock signal having a frequency equal to the frequency of the transmission clock signal is made to correspond to the phase of the messages received. This correspondence control operation consists in producing a variation, at each transition of a received message, in the phase of the reception clock signal by a quantity equal to + or -2.pi./N according as the transition of the received message leads or lags with respect to the corresponding transition of the reception clock signal (where 2.pi./N designates the elementary step of phase variation of the reception clock signal). The reception clock signal controlled in this manner is employed for sampling the message which has also been stored during the phase control stage. A device of this type is described in French patent Application No. 80 07 015 filed on Mar. 29th, 1980 in the name of the present applicant, the corresponding U.S. patent of which is U.S. Pat. No. 4,390,985.
A major drawback of such a device is that the synchronization of short messages is not possible. It is indeed clear that the number of transitions within the message will necessarily be smaller as the message is shorter (by transition is meant the changeover from one logic level to another) and the smaller the number of transitions, the longer the time taken to obtain synchronization. If it proves impossible in addition to modify the phase of the reception clock signal at each transition other than by elementary steps, it will immediately be apparent that the reception of a message will often be terminated before it has been possible to restore the synchronization.